Menu Home News Hardware Gaming Mobile Finance Deals Reviews How To Wccftech Apple’s A20 Rumored To Be Exclusive To The iPhone 18 Pro, iPhone 18 Pro Max And The Company’s Foldable Flagship, Will Leverage TSMC’s Advanced 2nm Process Combined With The Newer WMCM Packaging Omar Sohail • Jun 16, 2025 at 02:00am EDT TSMC might have started accepting orders for its 2nm wafers, but the first chipsets fabricated on this cutting-edge lithography are not expected to arrive until late next year. As the majority of you are well aware, Apple likely pounced on the opportunity to be the first recipient of this technology, with its A20 rumored to be mass produced on the 2nm process. However, the same rumor claims that the Cupertino firm will employ the foundry giant’s WMCM (Wafer-Level Multi-Chip Module) packaging, bringing in more benefits, but customers can only experience these if they intend on making the iPhone 18 Pro, iPhone 18 Pro Max, or Apple’s upcoming foldable flagship their daily driver. The latest rumor also claims that Apple will not be upping the RAM count on any iPhone model that will ship with the A20 The efforts to bring WMCM packaging to the A20 will be highly beneficial for Apple because it will allow the latter to maintain the chipset’s footprint while having immense flexibility in combining different components. In short, multiple dies such as the CPU, GPU, memory, and other parts can be integrated at a wafer level, before being sliced into individual chips. This approach will help Apple to mass manufacture smaller chipsets that are considerably power-efficient, but also powerful at the same time, leading to an incredible ‘performance per watt’ metric. China Times reports that this A20 upgrade will arrive for the iPhone 18 Pro, the iPhone 18 Pro Max, and Apple’s foldable flagship, which the rumor refers to as the iPhone 18 Fold. TSMC’s production line specifically for WMCM chipsets will be located in Chiayi AP7, with an estimated monthly production capacity of 50,000 pieces by the end of 2026. Interestingly, the RAM count will not change from this year, with Apple said to retain the 12GB limit. We have reported about the iPhone 18 series shifting to TSMC’s WMCM packaging before, while also talking about a separate rumor claiming that the A20 will be 15 percent faster than the A19 at the same power draw. The rumor does not mention whether the less expensive iPhone 18 models will be treated to chipsets featuring WMCM packaging, or if Apple intends to save on design and production costs by sticking with the older Integrated Fan-Out (InFo) packaging. All of these answers will be provided in the fourth quarter of 2026, when the iPhone 18 family goes official, so stay tuned. News Source: China Times Subscribe to get an everyday digest of the latest technology news in your inbox Follow us on Topics Sections Company Some posts on wccftech.com may contain affiliate links. We are a participant in the Amazon Services LLC Associates Program, an affiliate advertising program designed to provide a means for sites to earn advertising fees by advertising and linking to amazon.com © 2025 WCCF TECH INC. 700 - 401 West Georgia Street, Vancouver, BC, Canada

Menu Home News Hardware Gaming Mobile Finance Deals Reviews How To Wccftech Xiaomi Cannot Develop A Future In-House XRING Chipset Using TSMC’s 2nm Process Because Of The U.S. Crackdown On Specialized EDA Tools, Company Will Be Limited To The ‘N3E’ Node Omar Sohail • Jun 5, 2025 at 04:28am EDT The XRING 01 is a technological milestone, not just for Xiaomi, but it is also regarded as an achievement for China, and one that would make the U.S. government very nervous, because, like current-generation chipsets, the in-house solution has been mass produced on TSMC’s 3nm ‘N3E’ process. Unfortunately, Xiaomi’s progress might not scale past this threshold because the Trump administration has banned the export of EDA tools that are necessary to successfully fabricate a 2nm SoC. Tipster claims that EDA tools are mandatory in designing GAAFET structures, meaning that Xiaomi and its XRING division will be limited to TSMC’s ‘N3E’ node Since TSMC’s 2nm technology has a GAAFET structure, Weibo tipster Digital Chat Station states that it is imperative that Xiaomi gets hold of those EDA, or Electronic Design Automation tools. The Taiwanese semiconductor giant was reported to have begun accepting orders for 2nm wafers from April 1, with each unit estimated to cost $30,000. Among the regular trio of Apple, Qualcomm, and MediaTek, Xiaomi would count itself as one of TSMC’s customers. Sadly, with the recent development, the Chinese firm will be limited to the 3nm N3E node, facing a similar fate to Huawei. The latest claim also suggests that to possess the latest and greatest hardware in smartphone chipset technology, Xiaomi will have little choice but to continue relying on Qualcomm and MediaTek, which will unveil the Snapdragon 8 Elite Gen 2 and Dimensity 9500 later this year. Fortunately, restricting exports of cutting-edge machinery to China will only boost its resolve to continue the production of local EDA tools, but will this hardware be developed fast enough for the Xiaomi XRING 02 to be fabricated on TSMC’s 2nm process? We will have the answer to this question in the future. Readers should note that there is also the risk that the Trump administration enforces a massive ban on Xiaomi, preventing the latter from doing business with TSMC or Samsung in any way, shape, or form. While China is pursuing the manufacturing of custom EUV machinery to eliminate any overseas trade involvement, it may take several years for the country to achieve autonomy. News Source: Digital Chat Station Subscribe to get an everyday digest of the latest technology news in your inbox Follow us on Topics Sections Company Some posts on wccftech.com may contain affiliate links. We are a participant in the Amazon Services LLC Associates Program, an affiliate advertising program designed to provide a means for sites to earn advertising fees by advertising and linking to amazon.com © 2025 WCCF TECH INC. 700 - 401 West Georgia Street, Vancouver, BC, Canada

In context: TSMC has steadily raised the prices of its most advanced semiconductor process nodes over the past several years – so much so that one analysis suggests the cost per transistor hasn't decreased in over a decade. Further price hikes, driven by tariffs and rising development costs, are reinforcing the notion that Moore's Law is truly dead. The Commercial Times reports that TSMC's upcoming N2 2nm semiconductors will cost $30,000 per wafer, a roughly 66% increase over the company's 3nm chips. Future nodes are expected to be even more expensive and likely reserved for the largest manufacturers. TSMC has justified these price increases by citing the massive cost of building 2nm fabrication plants, which can reach up to $725 million. According to United Daily News, major players such as Apple, AMD, Qualcomm, Broadcom, and Nvidia are expected to place orders before the end of the year despite the higher prices, potentially bringing TSMC's 2nm Arizona fab to full capacity. Also see: How profitable are TSMC's nodes: crunching the numbers Unsurprisingly, Apple is getting first dibs. The A20 processor in next year's iPhone 18 Pro is expected to be the first chip based on TSMC's N2 process. Intel's Nova Lake processors, targeting desktops and possibly high-end laptops, are also slated to use N2 and are expected to launch next year. Earlier reports indicated that yield rates for TSMC's 2nm process reached 60% last year and have since improved. New data suggests that 256Mb SRAM yield rates now exceed 90%. Trial production is likely already underway, with mass production scheduled to begin later this year. // Related Stories With tape-outs for 2nm-based designs surpassing previous nodes at the same development stage, TSMC aims to produce tens of thousands of wafers by the end of 2025. TSMC also plans to follow N2 with N2P and N2X in the second half of next year. N2P is expected to offer an 18% performance boost over N3E at the same power level and 36% greater energy efficiency at the same speed, along with significantly higher logic density. N2X, slated for mass production in 2027, will increase maximum clock frequencies by 10%. As semiconductor geometries continue to shrink, power leakage becomes a major concern. TSMC's 2nm nodes will address this issue with gate-all-around (GAA) transistor architectures, enabling more precise control of electrical currents. Beyond 2nm lies the Angstrom era, where TSMC will implement backside power delivery to further enhance performance. Future process nodes like A16 (1.6nm) and A14 (1.4nm) could cost up to $45,000 per wafer. Meanwhile, Intel is aiming to outpace TSMC's roadmap. The company recently began risk production of its A18 node, which also features gate-all-around and backside power delivery. These chips are expected to debut later this year in Intel's upcoming laptop CPUs, codenamed Panther Lake.

Samsung Electronics is taking a major step in the right direction in semiconductor innovation by planning to adopt glass substrate in chip packaging starting in 2028. If you are not familiar, the transition marks a major shift from silicon-based interposers to glass interposers, and it is the first time the company has laid out an official roadmap for the evolution, according to ETNews. Samsung’s glass interposers could revolutionize AI chip packaging by offering better performance, lower costs, and faster production In chip manufacturing, interposers are a key component in 2.5D chip packaging, especially for AI semiconductors, where the GPUs are surrounded by high-bandwidth memory or HBM. The interposers are responsible for connecting the two components, allowing for faster communication. While the traditional interposers are effective, they are quite expensive considering how the AI industry is on the rise. In comparison, the glass interposers are cheaper, but feature more precision for ultra-fine circuits and improved dimensional stability. The benefits of the glass interposers definitely overtake the traditional interposers, which makes them a perfect option for next-gen AI chips. An industry official noted that “Samsung has established a plan to transition from silicon interposers to glass interposers in 2028 to meet customer demands.” The notion is in line with similar plans from competitors like AMD, which shows a surge in industry shift toward the new semiconductor technology. While the industry is gradually embarking on the glass substrate bandwagon for interposers, Samsung's rendition of the technology is different, as it is developing sub-100x100mm glass units to speed up the prototyping instead of using large glass panels with a size of 510x515mm. Even though the smaller size could hurt the efficiency, it will allow the company to enter the market much faster. Samsung is also utilizing its Cheonan campus panel-level packaging or PLP line, which makes use of square panels instead of round wafers. Overall, this will allow the company to sit in a much better position than the competition in the AI industry. Furthermore, the move also complements the company's AI Integrated Solution strategy, which would bring the foundry services, HBM memory, and advanced packaging under one umbrella. With the AI industry booming rapidly, Samsung's transition to a glass substrate for interposers could give it an edge over the competition in the long run. Since the technology is going to improve gradually, the company could also benefit from external orders, which would allow it to increase its revenue. We will keep a close eye on the transition, so be sure to stick around for more details. Deal of the Day

TSMC is signaling to the Trump administration that any plan to tariff foreign-made chips risks derailing the company’s $165 billion investment in Arizona semiconductor factories.The warning comes after the Commerce Department solicited public comment on the US potentially tariffing foreign-made semiconductors to help encourage domestic chip manufacturing. In its letter to the agency, TSMC said such tariffs could threaten demand for electronics and reduce the company’s revenue.  “Diminished demand could create uncertainty around the timeline for the construction and operation of our Arizona fabs. It could also undermine TSMC’s financial capacity to timely execute its ambitious Arizona project,” the company said. TSMC—which manufactures chips for Apple, AMD, Nvidia, and even Intel—added that: “Lower market demand for our leading US customers’ products may consequently reduce demand for TSMC’s manufacturing capacity and service onshore.”In March, TSMC announced an additional $100 billion investment in three new fabs in Arizona, for a total of six. But so far, only one of the fabs has started producing processors, forcing TSMC to rely on its factories in Taiwan for most chip manufacturing. As a result, the letter from TSMC urges the Trump administration to exclude the company from any semiconductor-related tariffs. “To allow investments such as TSMC Arizona to proceed expeditiously, the administration should exempt TSMC Arizona and other companies that have already committed to semiconductor manufacturing projects in the United States from tariffs or other import restrictions,” it said. The letter notes that the company’s Arizona site “will ultimately comprise around 30% of TSMC’s total worldwide capacity for 2nm and more advanced technology nodes,” which should also be enough to meet US demands. In addition, TSMC has already started construction on its third fab in Arizona, “which will initially use 2nm and later A16 process technology, featuring Super Power Rail, TSMC’s best-in-class backside power delivery solution.”Recommended by Our EditorsNumerous other companies and industry groups have also responding to the agency's request. In its letter, PC maker Dell said the effort to manufacture more chips in the US is “nascent and lacks the requisite infrastructure to supply these products at scale to meet current and increasing demand.” Meanwhile, Hewlett Packard Enterprise told the department: "HPE has no alternative but to import semiconductors for its US manufacturing operations. Imposing tariffs on those imported semiconductors would harm HPE's ability to maintain and expand its domestic manufacturing activities and retard US R&D and innovation ultimately to the detriment of national security and economic growth."But Intel, which manufactures chips in the US, took a slightly different view, noting the need to “Protect American Manufactured Semiconductor Wafers and Derivative Products.” “To sustain the US semiconductor industry and support global customers, policies must address structural disparities and incentivize US-based semiconductor manufacturing,” Intel said. “As foreign buyers increasingly design out US chips due to tariff-related costs, exempting goods with US-made semiconductors from these financial burdens is crucial.”The same letter calls for the Trump administration to exempt semiconductor wafers either made in the US “as well as wafers manufactured based on US-based process technologies and US-owned IP.” In addition, Intel wants exemptions for its supply chain, which includes chip-making equipment developed overseas. “While Intel is committed to building semiconductors in the US, fully localizing every element of the supply chain is economically unfeasible without significant cost increases and production delays,” the company added.

Even though Apple DID make a 5.3mm iPad Pro, let’s just remember that they didn’t have as much success slimming down their keyboards. Remember the infamous butterfly keys on the MacBooks of 2015? Well, after that travesty, Apple just went back to what worked – relying on good-old scissor switches that resulted in a marginally thicker, yet more practical and functional device. At just 8 millimeters thick, the ‘mikefive’ doesn’t look like it should be real—let alone functional. But it is. It’s 37% slimmer than Apple’s Magic Keyboard and still manages to pack in 1.8mm of key travel, tactile mechanical switches, wireless connectivity, and a cyberpunk-grade metal chassis. It’s the kind of gear that looks like it came from a movie prop shop specializing in dystopian sci-fi—only it types better than most of what’s on your desk. The mastermind behind it is Reddit user dynam1keNL, an industrial product designer who clearly decided the mechanical keyboard rabbit hole didn’t go deep enough. Built from scratch around Kailh’s obscure PG1316 laptop switches, the mikefive is what happens when obsessive design meets precision engineering. The custom transparent caps, the CNC-machined aluminum chassis, the completely flush PCB layout—it’s all been meticulously dialed in to create a keyboard that doesn’t just challenge what a mechanical board can be. It redefines it. Designer: dynam1keNL To start, the mikefive is built around the Kailh PG1316 switches—a lesser-known, laptop-style mechanical switch that isn’t just slim, it’s shockingly tactile. These things have a travel of 1.8mm, and despite their wafer-thin profile, they pack a surprisingly aggressive tactile bump. It’s a bold choice that bucks the trend of soft, mushy low-profile inputs. You feel every keypress, and not in a nagging way—more like a firm handshake with every letter. The design language leans into a sleek cyberpunk aesthetic: a CNC-machined aluminum chassis that feels like it belongs on the deck of a spaceship, paired with transparent keycaps that hint at the internals while catching ambient light like crystal circuitry. The keycaps are proprietary, square-shaped, and clear, subtly marked with mold letters from the inside. What makes this keyboard doubly fascinating is that it isn’t some big brand prototype or crowdfunding darling, it’s a homebrew labor of love from a designer-engineer with a background in industrial product design. The entire board, including its impossibly compact controller and 301230 battery, is laid out like a masterclass in minimalism. The switch mounts directly to the PCB with no pins poking through, letting the board itself double as the bottom plate. Both halves of the unibody design are angled 15 degrees for comfort, creating a total ergonomic tilt of 30 degrees. The bottom edge has been subtly shaved down near the thumb cluster to avoid interference. And while there’s a slight warp on one end from hotplate soldering (just old-fashioned human error), it’s barely a blemish on an otherwise refined build. Despite its experimental nature, the keyboard’s wireless connection (courtesy of a nicenano v2) works flawlessly, even with the metal chassis surrounding the internals. Clever placement of the Bluetooth antenna and strategic removal of ground planes near it help the signal escape. Typing on the mikefive is a tactile revelation. Coming from linear switches, the force required by the PG1316s might be a shock, but there’s a tactile clarity here that’s hard to ignore. And when you realize your wrists aren’t straining after hours of use, the ultra-low height starts to feel like a long-overdue standard. The post Ultra-Slim Cyberpunk Keyboard is 37% slimmer than Apple’s own Magic Keyboard first appeared on Yanko Design.

NVIDIA and Taiwan’s manufacturing ecosystem, including Delta Electronics, Foxconn, TSMC and Wistron, are showcasing this week at COMPUTEX in Taipei the crucial role digital twins play in accelerating industrial AI. These electronics, semiconductor and robotics manufacturing leaders are using Universal Scene Description (OpenUSD) and NVIDIA Omniverse libraries and blueprints to develop physically based digital twins. This is transforming factory planning by unlocking new operational efficiencies and accelerating the development, testing and validation of autonomous robots and robotic fleets. Many of these manufacturers are also extending the digitalization of their factories to the real world, using the NVIDIA AI Blueprint for video search and summarization (VSS) — now generally available and part of the NVIDIA Metropolis platform — to deploy video analytics AI agents into their operations and drive additional automation and optimizations in defect detection and other operations. Taiwan Manufacturers Optimize Planning and Operations With Simulation and AI Agents  Taiwan’s leading electronics and semiconductor manufacturers are using digital twins, physically based simulation and AI agents to optimize existing operations and vastly accelerate the planning and commissioning of new factories. Foxconn is leading the way. At its Taiwan facilities, Foxconn engineers rely on the Fii Digital Twin platform, developed with OpenUSD, Siemens and Omniverse technologies, to design and simulate robot work cells, assembly lines and entire factory layouts. These digital twins connect to material control systems and use Autodesk Flexsim, NVIDIA cuOpt and NVIDIA Isaac Sim to enable engineers to simulate and dynamically optimize the flow of materials, equipment, autonomous mobile robots (AMRs), automated guided vehicles, and other robots and humans. By developing a standard digital twin model for their factories, Foxconn can quickly migrate and easily reconfigure its designs and plans for new factory deployments. Foxconn is using the NVIDIA Isaac GR00T N1 model, the NVIDIA Isaac GR00T-Mimic blueprint for synthetic manipulation motion generation and NVIDIA Isaac Lab to train industrial manipulator arms and humanoid robots for performing complex tasks such as screw-tightening, pick and place, assembly and cable insertion. Foxconn robotics developers use the Mega NVIDIA Omniverse Blueprint to simulate and test large robotic fleets comprising AMRs, manipulators and humanoid robots before deploying them in facilities. To accelerate analysis and decision-making, Foxconn engineers use their digital twin platform to conduct thermal assessments of POD rooms across different scenarios. By connecting their digital twins to the Cadence Reality Digital Twin Platform and integrating NVIDIA PhysicsNeMo frameworks, teams can conduct thermal simulations 150x faster, reduce thermal risks and identify energy-saving opportunities. Using the Omniverse Blueprint for AI factory digital twins, Foxconn can simulate and test GB200 Grace Blackwell Superchips in liquid-cooled PODs to replicate the conditions of an AI factory. Credit: Foxconn The company is also deploying video analytics AI agents using the VSS blueprint from NVIDIA Metropolis for real-time video analysis and insights in live production scenarios. TSMC is collaborating with an AI-powered digital twins startup to optimize the planning and construction of its new fabs. TSMC taps into an AI engine and applications built with Omniverse libraries to transform traditional 2D computer-aided designs into rich, interactive 3D layouts of their complex facilities, including specialized areas like clean rooms. Credit: TSMC Visualizing these optimized layouts in a digital twin allows planning teams to proactively identify and resolve equipment collisions, understand system interdependencies, and assess impacts on space and operational key performance indicators. This AI-driven approach is enhanced by NVIDIA cuOpt for optimization and reinforcement learning with NVIDIA Isaac Lab, enabling the generation of intricate, multilevel piping systems in seconds — a task that traditionally requires substantial time and effort. This enables engineers to virtually validate complex pipe routing and drastically reduce design revisions, ultimately streamlining the entire fab development process. TSMC also uses vision language models and vision foundation models to improve automated defect classification workflows — boosting efficiency to classify wafer product defects for engineers to pinpoint potential root causes for the issues. Beyond the use of digital twins and vision AI, TSMC also taps into NVIDIA CUDA-X software libraries and NVIDIA GPUs to accelerate its entire semiconductor chip design workflow — from lithography with NVIDIA cuLitho to semiconductor process simulation. Wistron teams drive operational efficiencies, optimize layout planning of their plants, and train robots and workers with the Wistron Digital Twin (WiDT) platform. The platform is powered by software from Autodesk, Cadence and Microsoft and taps into NVIDIA AI and Omniverse libraries. By connecting the WiDT platform to generative AI tools and real-time data from surface mount technology machines and shopfloor control systems, operations teams can visualize real-time dashboards to quickly diagnose and improve machine and plant performance. Wistron robotics developers use the platform, and its integration with NVIDIA Isaac Sim, to simulate and test robotic arms. With a simulation-first approach, teams reduced the time needed for each arm to assemble parts on the production line by 12 seconds. Credit: Wistron The Wistron digital twin platform also uses the VSS blueprint to create and curate training videos for teaching workers how to perform and manage complex tasks and scenarios. The platform uses NVIDIA Cosmos Tokenizer to help teams analyze and break down worker actions on the production line and improve standard operating procedures. This approach is enabling Wistron to accelerate onboarding, improve worker productivity and ensure safety. Wiwynn uses AI-enabled digital twins built with Omniverse technologies to optimize factory layouts, simulate production, integrate cobots and enhance quality control through improved inspection and analysis. These solutions have driven significant manufacturing and logistics innovation and efficiencies. Pegatron’s PEGAVERSE and PEGAAi platforms equip engineers and factory managers with digital twins that support many use cases, including factory planning, predictive maintenance, process optimization, resource planning, remote monitoring and quality control. Teams also use the platforms to build visual AI agents to help workers perfect complex assembly tasks. These AI agents, developed with the NVIDIA AI Blueprint for VSS and NVIDIA Metropolis, have enabled Pegatron to augment assembly processes, reduce labor costs by 7% and decrease assembly line defect rates by 67%. Kenmec and MetAI are using Omniverse technologies and the Mega NVIDIA Omniverse Blueprint to build physically accurate digital twins for simulating, testing and deploying warehouse automation solutions. Together, the teams virtualized the entire Chief Smart Logistics Center, creating a full-fidelity simulation environment that brings together physical dynamics, real-time controller logic, AI-driven testing and optimization — all within a simulated environment. GIGABYTE operations teams are using digital twins developed with Omniverse libraries and connected to live IoT data from the manufacturing floor to improve operational monitoring of production systems. By visually flagging anomalies, including equipment issues and delays, the digital twins help teams quickly identify issues, conduct root cause analysis and take corrective actions. Quanta Cloud Technology engineering, operations and logistics teams collaborate using digital twin solutions built with Omniverse to accelerate factory planning. Digital twins provide these cross-functional teams with access to the latest design data, enabling them to provide immediate feedback on proposed layouts, which leads to optimized workflows and improved space utilization. Teams can further extend collaboration sessions to external customers and suppliers so they can remotely contribute to design reviews and validation. Credit: Quanta Manufacturers Embrace Digital Twins to Accelerate Robotics Development In addition to creating the future in manufacturing, Taiwan manufacturers are using digital twins, powered by Omniverse libraries and blueprints, to develop the next wave of AI-enabled robots. Delta Electronics is using Isaac Sim to optimize electronic component production and to simulate, train and validate its entire range of industrial robots — from AMRs to industrial manipulators. Credit: Delta Electronics The company is transforming its expertise into a service by designing a cyber-physical integrated classroom to be launched soon in Taiwan, where customers learn to use the DIATwin platform to simulate and integrate Delta’s industrial equipment and robots to ensure a more effective implementation into their own production lines. Credit: Techman Robot Techman Robot is advancing intelligent automation at Volkswagen’s Transparent Factory. Using Isaac Sim, Techman’s AI Cobots learn to operate on GESSbot AMRs in physically accurate simulations to perform real-time assembly, inspection and adaptive manipulation tasks with precision. By simulating robot behavior and workflows virtually, Techman Robot has reduced the time to program robots by 70% and improved robot productivity by 20%. Credit: Foxlink Foxlink is using the Isaac GR00T N1 model to add generalized intelligence and autonomy to its industrial robots used in manufacturing facilities. Solomon’s AI vision solution, powered by NVIDIA Isaac Manipulator CUDA-X acceleration libraries, is helping Inventec significantly accelerate its robotic server inspection process by boosting complex motion planning speed by up to 8x and reducing errors by 50%. Kudan is integrating its Visual SLAM technology with Isaac Perceptor CUDA-X acceleration libraries into NexAIoT’s AMR, NexMOV-2. This integration uses advanced 3D perception and navigation, enabling them to navigate complex, unstructured environments such as manufacturing, logistics and healthcare facilities with greater precision and reliability. MSI is powering its industrial robots with the NVIDIA Jetson AGX Orin module to perform a variety of tasks, from pick-and-place and material handling to delivering payloads inside large warehouses and facilities. Credit: Adata In healthcare, Adata and Advantech are jointly using Isaac Sim, Isaac Perceptor and Jetson Orin to develop AMRs for disinfecting hospitals. This collaboration has reduced deployment time by 70% and made the disinfection process 3x faster. Ubitus is also using the Isaac platform to train G1 humanoid robots to deliver medical checkup materials and specimens, helping alleviate labor shortages in hospitals. Learn more by watching the COMPUTEX keynote from NVIDIA founder and CEO Jensen Huang and attending sessions at NVIDIA GTC Taipei, running through May 22. See notice regarding software product information. Featured image courtesy of Quanta (top left), Wistron (top right), Foxconn (bottom left), Pegatron (bottom right).

TSMC, Cadence, KLA, Siemens and Synopsys are advancing semiconductor manufacturing by adopting the NVIDIA CUDA-X and NVIDIA Blackwell platforms.   NVIDIA Blackwell GPUs, NVIDIA Grace CPUs, high-speed NVIDIA NVLink fabrics and switches, and domain-specific NVIDIA CUDA-X libraries like NVIDIA cuDSS and NVIDIA cuLitho are improving computational lithography and device simulation for advanced chip manufacturing. “Our collaboration with NVIDIA represents a significant advancement in semiconductor process simulation,” said Jeff Wu, fellow and director for the technology computer-aided design division at TSMC. “The computational acceleration from CUDA-X libraries and NVIDIA Grace Blackwell will expedite process development by simulating complex manufacturing processes and device behaviors at lower cost.” NVIDIA cuLitho and Blackwell speed up lithography by up to 25x. GPU acceleration enables leading lithography providers and semiconductor manufacturers such as TSMC to predict and correct lithography issues before production at an unprecedented speed.   Earlier this month, electronic design automation (EDA) software and services provider Cadence announced its Millennium M2000 platform, built exclusively on NVIDIA Blackwell for the EDA market. The M2000 is a scalable turnkey solution for deploying NVIDIA Grace Blackwell and CUDA-X libraries with a fully accelerated portfolio of Cadence design tools. Cadence is also one of the first to adopt NVIDIA NVLink Fusion, enabling custom silicon scale-up to meet the requirements of demanding workloads for model training and agentic AI inference. By adopting NVLink Fusion, Cadence allows hyperscalers to optimize and validate across the entire design spectrum.  This month, Cadence announced the Millennium M2000 AI Supercomputer to transform silicon, system and drug design. Based on the NVIDIA Blackwell platform, options include the NVIDIA GB200 NVL72 system for tackling massive system-on-a-chip, 3D-IC, and subsystem implementation and signoff using Cadence Cerebrus AI Studio and Cadence multiphysics system analysis tools, as well as the new NVIDIA RTX PRO 6000 Blackwell Server Edition GPU for smaller chip designs and simulations. “Our collaboration with NVIDIA has always been about pushing the boundaries of what’s possible in both electronic design automation and system design and analysis,” said Michael Jackson, corporate vice president and general manager of the system design and analysis group at Cadence. “The Millennium M2000 platform, built exclusively on NVIDIA Blackwell, isn’t just about faster simulation — it’s about redefining the infrastructure for AI-driven innovation, enabling what was previously impossible.”  Siemens is harnessing the parallel processing power of the NVIDIA CUDA-X libraries and the groundbreaking performance of the Grace Blackwell platform to significantly accelerate its Calibre platform.  This integration enables unprecedented speed and accuracy in critical semiconductor manufacturing steps, including optical proximity correction with nanometer precision, comprehensive physical verification, robust design for manufacturability analysis, thorough reliability verification and seamless integration and automation across the design-to-manufacturing flow. “Leveraging NVIDIA CUDA-X and Grace Blackwell in our Calibre platform enables faster, more efficient optical proximity correction without sacrificing accuracy for advanced semiconductor nodes,” said Mike Ellow, CEO of Siemens EDA. “This is especially important as chip complexity continues to grow.” Additionally, Synopsys, a leading EDA software and services provider, is using NVIDIA CUDA-X libraries and Blackwell for its EDA tools, including Synopsys PrimeSim, Proteus, S-Litho, Sentaurus Device and QuantumATK. By integrating with CUDA-X libraries, Synopsys achieved new benchmark results for Sentaurus Device, QuantumATK, and S-Litho on the NVIDIA B200, demonstrating a 12x, 15x and 20x scale-up, respectively, versus comparable CPU infrastructure.  In addition, Synopsys recently announced at NVIDIA GTC that they project Synopsys PrimeSim to run 30x faster and Synopsys Proteus to run 20x faster on NVIDIA Blackwell platforms. “Synopsys has a long history of collaborating with NVIDIA on accelerating our EDA solutions to maximize the capabilities of engineering teams. Building on our industry-first approach, Synopsys is leveraging NVIDIA’s Blackwell architecture across our TCAD, computational lithography and atomistic simulation products to unlock unprecedented performance gains,” said Sanjay Bali, senior vice president of strategy and product management at Synopsys. “By integrating NVIDIA’s CUDA-X libraries and Blackwell architecture into our industry-leading simulation solvers, we’ve achieved transformative speedups and redefined how EDA is enabling semiconductor manufacturing innovation.” Semiconductor process control equipment manufacturer KLA and NVIDIA have worked together for over a decade to advance KLA’s physics-based AI with optimized high-performance computing solutions that tap into GPUs and the CUDA ecosystem.  The value of process control in semiconductor manufacturing is increasing due to AI-driven trends, such as more complex designs, accelerated product cycles, higher value wafer volumes and growing advanced packaging demand. KLA’s industry-leading inspection and metrology systems capture and process images by running complex AI algorithms to find the most critical semiconductor defects at lightning-fast speeds. KLA is looking forward to evaluating the NVIDIA RTX PRO 6000 Blackwell Server Edition with CUDA-X libraries for certain markets to further accelerate inference workloads powering the semiconductor chip manufacturing process. By embedding NVIDIA Blackwell into EDA, manufacturing and process control, NVIDIA is helping the semiconductor industry deliver the next generation of high-performance chips faster. Learn more about the latest AI advancements at NVIDIA GTC Taipei, running May 21-22 at COMPUTEX.

TL;DR: Intel's new CEO, Lip-Bu Tan, made it clear he isn't backing away from the company's push to become a top-tier foundry. Now, Intel has shared new details about how – and when – it expects chip manufacturing to become a profitable part of the business. At a recent investor conference, Intel Chief Financial Officer David Zinsner stated that he expects the company's foundry business to break even by 2027. Within a few years, Chipzilla should turn a profit and begin building the trust needed to attract new customers. Intel's chip business isn't in the best shape right now. The company has embraced a multi-foundry approach, outsourcing part of its wafer production to Taiwanese foundry TSMC while developing new advanced manufacturing nodes internally. Intel has scheduled mass production of the recently unveiled 18A and 14A nodes for 2027. Tom's Hardware notes that Intel will first use the 18A node (1.8nm) to manufacture Panther Lake client PC processors, with new consumer CPUs launching later this year. Intel will also apply the same technology to "Clearwater Forest" Xeon processors and some undisclosed third-party products. Nevertheless, the company sees the 18A node as a promising proof of concept to attract external customers. Zinsner expects larger third-party volumes to come from the 14A manufacturing node. Intel is currently partnering with potential customers, but the process remains challenging. Some clients leave after a few test chips, while others stick around without committing to significant production volumes. Intel still needs to prove it can operate as a reliable foundry business. Intel will use High-NA EUV lithography for the 14A node, initially increasing costs. The company hopes its advanced capabilities will eventually outweigh the expense. The foundry unit should also benefit from increased internal production, with both Panther Lake and Nova Lake processors set to be built entirely in-house. // Related Stories Intel believes its foundry business needs only a few billion dollars in additional external revenue to break even. The 14A node could see broader adoption among third-party customers, while more mature nodes like Intel 16 and partnerships with companies such as Tower and UMC will help diversify revenue sources.