Synopsys was already facing a slowdown in China. Now it's trying to assess the impact of new export restrictions.

The US has ordered companies that make software used to design semiconductors to stop selling to China without first obtaining export licenses. The restrictions go beyond software alone, covering chemicals for semiconductors, butane and ethane, machine tools, and aviation equipment, Reuters reported, citing two people familiar with the development. “On May 23, the US Government informed the Electronic Design Automation (EDA) industry about new export controls on EDA software to China and Chinese military end users globally,” said a Siemens EDA spokesperson. “Siemens has supported customers in China for more than 150 years and will continue to work with our customers globally to mitigate the impact of these new restrictions while operating in compliance with applicable national export control regimes. The company continues to support our employees and customers around the world who are using our technology to transform the everyday.” This represents the latest chapter in a tech war that began with restrictions on selling actual semiconductors to China. Now, the US is targeting the tools needed to design those chips — a potentially more damaging approach. Strategic shift to upstream controls Electronic design automation software makers — including industry leaders Cadence, Synopsys, and Siemens EDA — were sent notifications by the Commerce Department last Friday to cease supplying their technology to Chinese customers, the report said. The department will review license requests on a case-by-case basis, it added. The financial implications are substantial. Synopsys and Cadence earn annual revenue of about 16% and 12% from their China business. “With Cadence and Synopsys being US-based companies and Siemens contributing to more than 90% share of the EDA tools globally, this move further tightens EDA software sales in China,” said Neil Shah, VP for research and partner at Counterpoint Research. “EDA tools cannot be substituted and are the foundation to chip design and manufacturing.” What makes this strategically different is its upstream focus. Manish Rawat, semiconductor analyst at TechInsights, explained that, unlike previous hardware restrictions, “the new focus on EDA software targets the critical tools essential for designing advanced chips (5nm and below). This upstream control aims to block innovation before chips are manufactured, making it a more preemptive and disruptive tactic.” Why now? The timing reflects broader strategic recalibration. Rawat noted that “the US has shifted its strategy, now seeing China’s push for tech self-sufficiency — especially in AI and semiconductors — as a growing national security threat.” Since the 2020 CHIPS Act, coordinated export controls with allies like Japan and the Netherlands have strengthened US resolve. Sanchit Vir Gogia, chief analyst and CEO at Greyhound Research, observed that targeting design-phase technologies “seeks to constrain the conceptual stage of advanced chip development — not merely production.” The timing may also serve as “a strategic bargaining tool amid paused tariffs and ongoing diplomacy,” Rawat suggested, signaling US willingness to escalate tech restrictions to strengthen its negotiating position. The EDA software packages from companies like Synopsys and Cadence are central to modeling, simulation, and verification of complex semiconductor architectures. “The software lifecycle of these tools is super important with updates, patches, and support to be at the forefront of leading edge, which will stop with the restrictions on licensing,” Shah pointed out. This ongoing dependency means even alternative tools would struggle to keep pace with rapidly evolving chip design requirements without continuous vendor support. China’s long road to independence For China, developing viable alternatives presents enormous challenges. While Chinese companies like Empyrean, Primarius, and Entasys have emerged as domestic providers, they remain far behind. “Developing advanced EDA software on par with Synopsys or Cadence is highly complex, requiring decades of R&D,” Rawat explained. “Fully closing the gap — especially for cutting-edge sub-7nm chip design — could take 5 to 10 years or more.” Gogia added that “while notable progress has been made in selected areas of analog and layout tooling, full-stack integration across simulation, IP compatibility, and foundry certification continues to lag.” The gap is widening. Shah noted that Cadence recently announced M2000 Supercomputers, integrating advanced AI into EDA workflows. “This widens the gap between what China can build with an indigenous toolchain, as these US companies are miles ahead.” However, China may have breathing room. “China has been relegated to access to advanced process nodes, so in the near to mid-term, they might not need an advanced toolchain as they won’t be able to design or manufacture advanced chips,” Shah observed. Beijing’s likely response China’s response will likely be multifaceted. “Beijing is likely to accelerate funding through increased subsidies and incentives for domestic EDA startups,” Rawat said. “It will also aggressively recruit global experts and repatriate Chinese talent with semiconductor software expertise.” Beyond domestic development, “China may build alternative chip design ecosystems less reliant on US intellectual property, though these will initially lag in sophistication,” Rawat added. Diplomatic measures may include reciprocal restrictions on US firms or supply chains involving Chinese technology. Toward a bifurcated design world The restrictions are accelerating what analysts see as an inevitable split. Gogia described emerging “parallel EDA stacks” where “global design ecosystems may begin to diverge, with export controls catalyzing separate compliance frameworks and IP governance models.” “This is accelerating a split into two spheres: a US-led system using Western tools and IP protections, and a China-led system focused on domestic tools and foundries,” Rawat added. This separation isn’t just technical — it’s institutional. “Engineering workflows, legal oversight, cloud infrastructure, and partner ecosystems are all being restructured to manage compliance in a fractured regulatory environment,” Gogia said. Global industry implications For multinational companies, this fragmentation creates significant challenges. “Multinational firms may need to adopt dual design workflows and navigate stricter compliance, affecting partnerships and operational efficiency,” Rawat said. Organizations face maintaining duplicate systems and complex compliance across jurisdictions. Smaller firms may find duplication costs force market exits or a narrowed geographic focus. To mitigate risks, companies “are likely to diversify supply chains and expand in neutral regions like India, Vietnam, and Singapore, emerging as new semiconductor design hubs,” Rawat pointed out. The EDA software restrictions represent the latest evolution in US-China tech competition, moving from end-product controls to fundamental design capabilities. “US continues to find stranglehold on China with critical software and hardware to cut off access to critical and advanced tools,” Shah said. For enterprise technology leaders, this signals an era where geopolitical considerations increasingly shape technology architecture decisions, requiring strategic planning for an increasingly fragmented world. Cadence and Synopsys did not respond to requests for comment by publication time.

TSMC, Cadence, KLA, Siemens and Synopsys are advancing semiconductor manufacturing by adopting the NVIDIA CUDA-X and NVIDIA Blackwell platforms.   NVIDIA Blackwell GPUs, NVIDIA Grace CPUs, high-speed NVIDIA NVLink fabrics and switches, and domain-specific NVIDIA CUDA-X libraries like NVIDIA cuDSS and NVIDIA cuLitho are improving computational lithography and device simulation for advanced chip manufacturing. “Our collaboration with NVIDIA represents a significant advancement in semiconductor process simulation,” said Jeff Wu, fellow and director for the technology computer-aided design division at TSMC. “The computational acceleration from CUDA-X libraries and NVIDIA Grace Blackwell will expedite process development by simulating complex manufacturing processes and device behaviors at lower cost.” NVIDIA cuLitho and Blackwell speed up lithography by up to 25x. GPU acceleration enables leading lithography providers and semiconductor manufacturers such as TSMC to predict and correct lithography issues before production at an unprecedented speed.   Earlier this month, electronic design automation (EDA) software and services provider Cadence announced its Millennium M2000 platform, built exclusively on NVIDIA Blackwell for the EDA market. The M2000 is a scalable turnkey solution for deploying NVIDIA Grace Blackwell and CUDA-X libraries with a fully accelerated portfolio of Cadence design tools. Cadence is also one of the first to adopt NVIDIA NVLink Fusion, enabling custom silicon scale-up to meet the requirements of demanding workloads for model training and agentic AI inference. By adopting NVLink Fusion, Cadence allows hyperscalers to optimize and validate across the entire design spectrum.  This month, Cadence announced the Millennium M2000 AI Supercomputer to transform silicon, system and drug design. Based on the NVIDIA Blackwell platform, options include the NVIDIA GB200 NVL72 system for tackling massive system-on-a-chip, 3D-IC, and subsystem implementation and signoff using Cadence Cerebrus AI Studio and Cadence multiphysics system analysis tools, as well as the new NVIDIA RTX PRO 6000 Blackwell Server Edition GPU for smaller chip designs and simulations. “Our collaboration with NVIDIA has always been about pushing the boundaries of what’s possible in both electronic design automation and system design and analysis,” said Michael Jackson, corporate vice president and general manager of the system design and analysis group at Cadence. “The Millennium M2000 platform, built exclusively on NVIDIA Blackwell, isn’t just about faster simulation — it’s about redefining the infrastructure for AI-driven innovation, enabling what was previously impossible.”  Siemens is harnessing the parallel processing power of the NVIDIA CUDA-X libraries and the groundbreaking performance of the Grace Blackwell platform to significantly accelerate its Calibre platform.  This integration enables unprecedented speed and accuracy in critical semiconductor manufacturing steps, including optical proximity correction with nanometer precision, comprehensive physical verification, robust design for manufacturability analysis, thorough reliability verification and seamless integration and automation across the design-to-manufacturing flow. “Leveraging NVIDIA CUDA-X and Grace Blackwell in our Calibre platform enables faster, more efficient optical proximity correction without sacrificing accuracy for advanced semiconductor nodes,” said Mike Ellow, CEO of Siemens EDA. “This is especially important as chip complexity continues to grow.” Additionally, Synopsys, a leading EDA software and services provider, is using NVIDIA CUDA-X libraries and Blackwell for its EDA tools, including Synopsys PrimeSim, Proteus, S-Litho, Sentaurus Device and QuantumATK. By integrating with CUDA-X libraries, Synopsys achieved new benchmark results for Sentaurus Device, QuantumATK, and S-Litho on the NVIDIA B200, demonstrating a 12x, 15x and 20x scale-up, respectively, versus comparable CPU infrastructure.  In addition, Synopsys recently announced at NVIDIA GTC that they project Synopsys PrimeSim to run 30x faster and Synopsys Proteus to run 20x faster on NVIDIA Blackwell platforms. “Synopsys has a long history of collaborating with NVIDIA on accelerating our EDA solutions to maximize the capabilities of engineering teams. Building on our industry-first approach, Synopsys is leveraging NVIDIA’s Blackwell architecture across our TCAD, computational lithography and atomistic simulation products to unlock unprecedented performance gains,” said Sanjay Bali, senior vice president of strategy and product management at Synopsys. “By integrating NVIDIA’s CUDA-X libraries and Blackwell architecture into our industry-leading simulation solvers, we’ve achieved transformative speedups and redefined how EDA is enabling semiconductor manufacturing innovation.” Semiconductor process control equipment manufacturer KLA and NVIDIA have worked together for over a decade to advance KLA’s physics-based AI with optimized high-performance computing solutions that tap into GPUs and the CUDA ecosystem.  The value of process control in semiconductor manufacturing is increasing due to AI-driven trends, such as more complex designs, accelerated product cycles, higher value wafer volumes and growing advanced packaging demand. KLA’s industry-leading inspection and metrology systems capture and process images by running complex AI algorithms to find the most critical semiconductor defects at lightning-fast speeds. KLA is looking forward to evaluating the NVIDIA RTX PRO 6000 Blackwell Server Edition with CUDA-X libraries for certain markets to further accelerate inference workloads powering the semiconductor chip manufacturing process. By embedding NVIDIA Blackwell into EDA, manufacturing and process control, NVIDIA is helping the semiconductor industry deliver the next generation of high-performance chips faster. Learn more about the latest AI advancements at NVIDIA GTC Taipei, running May 21-22 at COMPUTEX.

Editor’s note: This post is part of Into the Omniverse, a series focused on how developers, 3D practitioners and enterprises can transform their workflows using the latest advances in OpenUSD and NVIDIA Omniverse. Computer-aided engineering (CAE) is at the forefront of modern product development, enabling engineers to virtually test and refine designs before building physical prototypes. Among the powerful CAE methods, computational fluid dynamics (CFD) simulation plays a critical role in understanding and optimizing fluid flow for use cases, such as aerodynamic testing in aerospace and automotive engineering or thermal management for electronics. The NVIDIA Omniverse Blueprint for real-time digital twins provides a powerful framework for developers to build complex CFD simulation solutions with the combined power of NVIDIA CUDA-X acceleration libraries, NVIDIA PhysicsNeMo AI framework and NVIDIA Omniverse, and Universal Scene Description (OpenUSD). Multiphysics simulation generates a high diversity of data with optical, thermal, electromagnetic and mechanical applications, all requiring different inputs and outputs. OpenUSD provides a unified data model that connects the CAE ecosystem so digital twins can operate in real time with diverse data inputs. This seamless interoperability between tools is crucial for engineering efforts that rely on accurate, consistent CFD simulations. Industry Leaders Deliver 50x Faster Simulation  At NVIDIA GTC in March, NVIDIA announced that leading CAE software providers, including Ansys, Altair, Cadence, Siemens and Synopsys, are accelerating their simulation tools, including for CFD, by up to 50x with the NVIDIA Blackwell platform. Thanks to accelerated software, NVIDIA CUDA-X libraries and performance-optimization blueprints, industries like automotive, aerospace, energy, manufacturing and life sciences can greatly reduce product development time and costs while increasing design accuracy and remaining energy efficient. Ansys, a leader in simulation software, is harnessing the power of NVIDIA technologies for real-time physics and accelerated simulation with AI-driven digital twins. By integrating NVIDIA GPUs and tapping into Blackwell’s advanced accelerated computing capabilities, Ansys software enables engineers to run complex CFD simulations at unprecedented speed and scale. Real-Time Digital Twins for CFD Ansys is also adopting Omniverse and OpenUSD to create more connected, collaborative simulation environments for CFD. Ansys users can build real-time digital twins that integrate data from multiple sources, and now those multidisciplinary CFD simulations can be integrated into the visually rich Omniverse environment. Learn more about how Ansys is using NVIDIA technologies and OpenUSD to advance its CFD workflows in this livestream replay: Get Plugged Into the World of OpenUSD Join NVIDIA GTC Taipei at COMPUTEX, running May 19-23, to see how accelerated computing, Omniverse and OpenUSD advance 3D workflows. Watch NVIDIA founder and CEO Jensen Huang’s COMPUTEX keynote on Monday, May 19, at 11 a.m. Taiwan Time. Ansys Simulation World is a virtual and in-person global simulation experience. The virtual event takes place July 16-17, and includes a keynote from Huang that will provide a closer look at the transformative power of accelerated computing and AI to enable computational engineering breakthroughs – including CFD – across all industries. Until then, watch Ansys GTC sessions on demand to learn more. Discover why developers and 3D practitioners are using OpenUSD and learn how to optimize 3D workflows with the new self-paced “Learn OpenUSD” curriculum for 3D developers and practitioners, available for free through the NVIDIA Deep Learning Institute. For more resources on OpenUSD, explore the Alliance for OpenUSD forum and the AOUSD website. Stay up to date by subscribing to NVIDIA Omniverse news, joining the community and following NVIDIA Omniverse on Instagram, LinkedIn, Medium and X. Featured image courtesy of Ansys.