First details of AMD's 6th Gen EPYC Venice CPUs based on the Zen 6 & Zen 6 core architectures have leaked & reports up to 256 cores. AMD Pumps Out 256 Cores For Its Next-Gen EPYC Venice CPUs Featuring Zen 6 & Zen 6C Architectures, Up To Double The Cache Versus Turin Reports surrounding the AMD 6th Gen EPYC Venice CPU platform have picked up the pace ever since Team Red confirmed that these will be the first chips to be made using TSMC's latest 2nm process technology. But the first details of these chips have been around since 2022, with more information being shared in 2023, so a good chunk of work has been out in the wild, and now, we have even more data from new leaks. Based on previous reports, AMD's 6th Gen EPYC Venice CPUs will come in two flavors, just like the Zen 5 and Zen 4 offerings, a standard Zen 6 variant and a denser Zen 6C variant. These will be featured in the SP7 and SP8 sockets, with the former being the higher-end solution while the latter aims at the entry-level server solutions. The platform will come with both 16 & 12-channel memory support. Image Source: Baidu Forums Now, coming to the juicy bits, there are several leaks reported in the Tieba Baidu forums, all of which point towards the alleged specs of the next-gen server powerhouses. First up, we have what seems to be a CCD layout of the chip featuring at least four CCDs on one side and four on the other, leading to a total of 8 CCDs. Each CCD packs 12 Zen 6 cores, and there are multiple IODs in the middle, which would lead to further expansion of I/O capabilities on these server platforms. Image Source: Baidu Forums These round up to a total of 96 cores and 192 threads, which would be the same core counts as the current Zen 5-based Turin "EPYC 9005" offerings, but they are reported to pack up to 128 MB of L3 cache per CCD. It is not reported if the 128 MB L3 cache is for the Zen 6 or Zen 6C variants, but for a Zen 6C EPYC chip, which gives us 2 MB of L3 per core. As for the EPYC 9006 "Zen 6" SKUs, they will have up to 96 cores and 192 threads with up to 8 CCDs as reported above, while Zen 6C variants will scale up to 256 cores and 512 threads. Additional details come from Bionic_Squash, who reports that the SP7 variants will feature TDPs of around 600W, up from 400W on Zen 5, and the SP8 chips will feature TDPs between 350- 400W. It should look like the following: EPYC 9006 "Venice" With Zen 6C: 256 Cores / 512 Threads / Up To 8 CCDs EPYC 9005 "Turin" With Zen 5C: 192 Cores / 384 Threads / Up To 12 CCDs EPYC 9006 "Venice" With Zen 5: 96 Cores / 192 Threads / Up To 8 CCDs EPYC 9005 "Turin" With Zen 5: 96 Cores / 192 Threads / Up To 16 CCDs The lineups will feature an extensive array of SKUs for data center and HPC customers to select from. These are still initial details, but Zen 6 is expected to launch sometime next year, so we are probably going to hear much more from Team Red in the coming time. AMD EPYC CPU Families: Family NameAMD EPYC VeniceAMD EPYC Turin-XAMD EPYC Turin-DenseAMD EPYC TurinAMD EPYC SienaAMD EPYC BergamoAMD EPYC Genoa-XAMD EPYC GenoaAMD EPYC Milan-XAMD EPYC MilanAMD EPYC RomeAMD EPYC Naples Family BrandingEPYC 9006EPYC 9005EPYC 9005EPYC 9005EPYC 8004EPYC 9004EPYC 9004EPYC 9004EPYC 7004EPYC 7003EPYC 7002EPYC 7001 Family Launch2026?20252025202420232023202320222022202120192017 CPU ArchitectureZen 6Zen 5Zen 5CZen 5Zen 4Zen 4CZen 4 V-CacheZen 4Zen 3Zen 3Zen 2Zen 1 Process Node2nm TSMC4nm TSMC3nm TSMC4nm TSMC5nm TSMC4nm TSMC5nm TSMC5nm TSMC7nm TSMC7nm TSMC7nm TSMC14nm GloFo Platform NameSP7SP5SP5SP5SP6SP5SP5SP5SP3SP3SP3SP3 SocketTBDLGA 6096 (SP5)LGA 6096 (SP5)LGA 6096LGA 4844LGA 6096LGA 6096LGA 6096LGA 4094LGA 4094LGA 4094LGA 4094 Max Core Count9612819212864128969664646432 Max Thread Count19225638425612825619219212812812864 Max L3 CacheTBD1536 MB384 MB384 MB256 MB256 MB1152 MB384 MB768 MB256 MB256 MB64 MB Chiplet Design8 CCD's (1 CCX per CCD) + 2 IOD?16 CCD's (1CCX per CCD) + 1 IOD12 CCD's (1CCX per CCD) + 1 IOD16 CCD's (1CCX per CCD) + 1 IOD8 CCD's (1CCX per CCD) + 1 IOD12 CCD's (1 CCX per CCD) + 1 IOD12 CCD's (1 CCX per CCD) + 1 IOD12 CCD's (1 CCX per CCD) + 1 IOD8 CCD's (1 CCX per CCD) + 1 IOD8 CCD's (1 CCX per CCD) + 1 IOD8 CCD's (2 CCX's per CCD) + 1 IOD4 CCD's (2 CCX's per CCD) Memory SupportDDR5-XXXX?DDR5-6000?DDR5-6400DDR5-6400DDR5-5200DDR5-5600DDR5-4800DDR5-4800DDR4-3200DDR4-3200DDR4-3200DDR4-2666 Memory Channels16-Channel (SP7)12 Channel (SP5)12 Channel12 Channel6-Channel12 Channel12 Channel12 Channel8 Channel8 Channel8 Channel8 Channel PCIe Gen SupportTBDTBD128 PCIe Gen 5128 PCIe Gen 596 Gen 5128 Gen 5128 Gen 5128 Gen 5128 Gen 4128 Gen 4128 Gen 464 Gen 3 TDP (Max)~600W500W (cTDP 600W)500W (cTDP 450-500W)400W (cDP 320-400W)70-225W320W (cTDP 400W)400W400W280W280W280W200W